The Hwacha project is developing a new vector architecture for future computer systems that are constrained in their power and energy consumption. Inspired by traditional vector machines from the 70s and 80s, and lessons learned from our previous vector-thread architectures Scale and Maven, we are bringing back elegant, performant, and energy-efficient aspects of vector processing to modern data-parallel architectures. We propose a new vector-fetch architectural paradigm, which focuses on the following aspects for higher performance, better energy efficiency, and lower complexity.
Hide Memory Latency with Decoupling for Better Efficiency.
Exploit Operand Uniformity with Scalarization.
Handle Control Flow Efficiently with Predication.
Support Mixed-Precision Seamlessly.
Optimize for Temporal Operand Re-Usage.
OS-Friendly from the Ground Up.
Following the name of our RISC-V scalar core "Rocket", the name "Hwacha" refers to the multiple rocket launcher from ancient Korea and serves as a pun on the parallel nature of vectors. Hwacha even starred on Discovery's television show MythBusters.
We are developing Hwacha as a RISC-V non-standard extension (ISA string: Xhwacha) that fits into the RoCC (Rocket Custom Coprocessor) interface. We are carefully designing the microarchitecture to ensure high-quality VLSI implementations of Hwacha. Hwacha has already been taped out multiple times on 28nm and 45nm nodes, and running at 1.5GHz+ speeds. We have developed a loop-based auto-vectorizer for Hwacha, and are currently in the process of bringing up an OpenCL compiler that targets Hwacha. We plan to open-source our hardware/software infrastructure, so if you are interested, please stay tuned.
- March 2016: Hwacha tapes out on Hurricane.
- Dec 2015: We have published the Hwacha architecture (including the Hwacha ISA) and microarchitecture manual, as well as preliminary evaluation results.
- Jan 2015: We are actively working on the Hwacha ISA document.
- Jan 2015: Hwacha website goes public.
- Dec 2014: Yunsup presents "Exploring the Design Space of SPMD Divergence Management on Data-Parallel Architectures" at MICRO.
- Nov 2014: Hwacha tapes out on Raven3.5.
- Sep 2014: Yunsup presents "A 45nm 1.3GHz 16.7 Double-Precision GFLOPS/W RISC-V Processor with Vector Accelerators" at ESSCIRC.
- Jun 2014: Albert presents "A Case for MVPs: Mixed-Precision Vector Processors" at PRISM/ISCA.
- Mar 2014: Yunsup presents "Hwacha: What GPUs Can Learn From Vectors" at GTC.
- Mar 2014: Hwacha tapes out on EOS22.
- "The Hwacha Vector-Fetch Architecture Manual, Version 3.8.1", Yunsup Lee, Colin Schmidt, Albert Ou, Andrew Waterman, Krste Asanović, Technical Report, UCB/EECS-2015-262, EECS Department, University of California, Berkeley, December 2015. PDF
- "The Hwacha Microarchitecture Manual, Version 3.8.1", Yunsup Lee, Albert Ou, Colin Schmidt, Sagar Karandikar, Howard Mao, Krste Asanović, Technical Report, UCB/EECS-2015-263, EECS Department, University of California, Berkeley, December 2015. PDF
- "Hwacha Preliminary Evaluation Results, Version 3.8.1", Yunsup Lee, Colin Schmidt, Sagar Karandikar, Daniel Dabbelt, Albert Ou, Krste Asanović, Technical Report, UCB/EECS-2015-264, EECS Department, University of California, Berkeley, December 2015. PDF
- "Exploring the Design Space of SPMD Divergence Management on Data-Parallel Architectures", Yunsup Lee, Vinod Grover, Ronny Krashinsky, Mark Stephenson, Stephen W. Keckler, Krste Asanović, 47th International Symposium on Microarchitecture (MICRO-47), Cambridge, UK, December 2014. PDF | Talk
- "A 45nm 1.3GHz 16.7 Double-Precision GFLOPS/W RISC-V Processor with Vector Accelerators", Yunsup Lee, Andrew Waterman, Rimas Avižienis, Henry Cook, Chen Sun, Vladimir Stojanovć, Krste Asanović, 40th European Solid-State Circuits Conference (ESSCIRC-40), Venice, Italy, September 2014. PDF | Talk
- "A Case for MVPs: Mixed-Precision Vector Processors", Albert Ou, Quan Nguyen, Yunsup Lee, Krste Asanović, 2nd International Workshop on Parallelism in Mobile Platforms (PRISM-2), at the 41st International Symposium on Computer Architecture (ISCA-41), Minneapolis, MN, June 2014. PDF
- "Hwacha: What GPUs Can Learn From Vectors", Yunsup Lee, Ronny Krashinsky, Vinod Grover, Stephen W. Keckler, Krste Asanović, Poster at the 2014 NVIDIA GPU Technology Conference (GTC-2014), San Jose, CA, March 2014. PDF
- "Hardware/Software Codesign for Mobile Speech Recognition", David Sheffield, Michael Anderson, Yunsup Lee, Kurt Keutzer, 14th Conference of the International Speech Communication Association (INTERSPEECH-14), Lyon, France, August 2013. PDF
- "Measuring the Gap between Programmable and Fixed-Function Accelerators: A Case Study on Speech Recognition", Yunsup Lee, David Sheffield, Andrew Waterman, Michael Anderson, Kurt Keutzer, Krste Asanović, Poster at the 25th Symposium on High Performance Chips (HotChips-25), Stanford, CA, August 2013. PDF
- "A Case for OS-Friendly Hardware Accelerators", Huy Vo, Yunsup Lee, Andrew Waterman, Krste Asanović, 7th Workshop on the Interaction between Operating System and Computer Architecture (WIVOSCA-2013), at the 40th International Symposium on Computer Architecture (ISCA-40), Tel Aviv, Israel, June 2013. PDF
Many people have been working on the Hwacha project. People who graduated UC Berkeley and are no longer actively working on the project have their initial or current position in brackets.
Yunsup Lee (Graduate Student, UC Berkeley) www.cs.berkeley.edu/~yunsup
Albert Ou (Graduate Student, UC Berkeley)
Colin Schmidt (Graduate Student, UC Berkeley)
Andrew Waterman (Graduate Student, UC Berkeley) www.cs.berkeley.edu/~waterman
Huy Vo [Oracle]
Quan Nguyen [Graduate Student, MIT] www.ocf.berkeley.edu/~qmn
Krste Asanovic (Professor, UC Berkeley) www.cs.berkeley.edu/~krste